Abstract- In this article describe the performance of a sinusoidal current controller based three-phase shunt active power line conditioners (APLC) for power quality improvements such as harmonics and reactive power compensation due to unbalanced and non-linear loads. The voltage distortions are compensated by positive-sequence voltage detector and harmonic extracted from constant instantaneous real power control strategy, this approach is different from the conventional methods. The shunt APLC is implemented with PWM current controlled voltage source inverter and connected to the point of common coupling for eliminate the current harmonic and make sinusoidal current to the source. The reference current(s) are extracted from sinusoidal current controller algorithm and PWM-VSI gate control signals are generated from hysteresis current controller (HCC). The proportional integral (PI)-controller used to maintain the constant DC-side capacitance voltage of the PWM inverter. The shunt APLC is investigated in terms of order of harmonics, VDC settling time and various parameters under the various non-linear load conditions.
Keywords- Shunt Active Power Line Conditioners (APLC), Hysteresis Current Controller (HCC), Sinusoidal current controller, Positive sequence voltage detector.
Introduction
Power transmission and distribution systems are criticized by power quality problems due to the non-linear loads, such as power converters, rectifiers, arc furnaces and other industrial applications like variable speed drives. These non-linear loads introduce harmonic distortion in the power distribution system [1]. The current harmonics cause the malfunctions in sensitive equipment, overvoltage by resonance and harmonic voltage drop across the network impedance that result is poor power factor. Traditionally these problems were solved by LC passive filters. But in practical applications these passive filters introduce aging and tuning problems, resonance, large size and it's also limited to few harmonics. The different configurations of static VAR compensators (SVCs) have been participated for solve these problems of power-factor correction. Unfortunately some SVCs produce lower-order harmonics themselves and response time of some SVCs may be too long to be acceptable for fast-fluctuating loads [2-3]. Recently active power filters (APF) or active power-line conditioners (APLC) are developed for compensate the current-harmonics and reactive power simultaneously due to power factor correction [4]. The APLC has the ability to keep the mains current balanced after compensating regardless of either the load is non-linear and/or unbalanced conditions. The APLC can be connected in series for operate as voltage source and in parallel for operate as current source, but the series APF is not found in common practical use, so this paper concentrate the shunt APLC system [5].
Controller is the sole of the active power filter and currently lot of research is being conducted and proposed various control strategies [6-7]. The sinusoidal current controller algorithm is widely applied for active filter design, because simple mathematical calculation, robustness and good dynamic response. This controller contains of positive sequence voltage detector and instantaneous power theory (p-q theory) concept [3]. The basis of instantaneous power theory is providing good compensation characteristics. Current harmonics is achieved by injecting equal but opposite current harmonic components at the point of common coupling (PCC), there by canceling the original distortion and improving the power quality on the connected power system.
This paper presents sinusoidal current controller based shunt APLC for current harmonics and reactive power compensation under non-linear and unbalanced loads. The shunt APLC is implemented with three phase PWM voltage source inverter and connected to the ac mains network at the point of common coupling for compensate the harmonics by injecting equal but opposite harmonic compensating current. The reference currents are generated using sinusoidal current controller and PWM-VSI gate control signals are derived from hysteresis current controller, this approach is different from conventional methods. The Proportional Integral (PI) controller used to maintains the dc-side capacitance voltage of the PWM inverter constant. The shunt APLC is investigated and measured various parameter values under different loads.
Sinusoidal Current Control strategy
Shunt APLC system design
Shunt active power filter is connected in parallel with the distribution supply and the non-linear loads at the point of common coupling. The three phase active power filter consist of six power transistors with freewheeling diodes, a dc capacitor, RL filter, compensation controller (sinusoidal current controller) and gate signal generator (hysteresis current controller) shown in the fig 1. The reference current generated using sinusoidal current controller and this controller contains the positive sequence voltage detector and instantaneous power theory calculations. The RL-filter suppresses the harmonics caused by the switching operation of the IGBTs inverter. Current harmonics is achieved by injecting equal but opposite current harmonic components at the point of common coupling, there by canceling the original distortion and improving the power quality on the connected power distributed system.
PWM-VSI
Hysteresis Current Controller
VDC
VDC,ref
Vsa,Vsb,Vsc
isa,isb,isc
ica,icb,icc
Rs,Ls
PCC
Filter
isa*,isb*,isc*
N
Unbalanced load
RL, LL
3-Phase Source
A
B
C
RL
LL
C
B
A
Non-sinusoidal Load
Current
Sensor
Voltage
Sensor
A
B
C
G
PI Controller
Vdc Sensor
Instantaneous Power theory calculation
Sinusoidal current control
Positive sequence voltage detector
CDC
Fig 1 Shunt APLC implemented with PWM-VSI Configuration
Sinusoidal current control strategy
The block diagram of the sinusoidal current control strategy is shown in fig 2. This block contains the Positive sequence voltage detector, PI controller, Clarke transformation, Instantaneous power calculation, Low pass filter (LPF), current calculation and Inverse Clarke transformation. The distorted or imbalanced voltage sources involved the fundamental positive sequence voltage detector (shown in fig 3), which uses a PLL circuit (shown in fig 4) locked to the fundamental frequency of the system voltages. It should synchronizing angle to generate unitary and balanced sinusoidal voltage signals. These instantaneous 3-phase coordinate voltages are transformed into the coordinates by using the Clarke transformation, it can be written as [3]
The instantaneous source current also transformed into the coordinates by Clarke transformation;
Whereand axes are the orthogonal coordinates and are on the-axis and are on the-axis. Let the instantaneous real power calculated in the -axis and the -axis of the current and voltage respectively. They are given by the conventional definition of real power as follows:
This instantaneous real powerallows only the fundamental frequency with the set of Butterworth design based 50 Hz low pass filter for calculate the real power losses and it's defined as
The DC power losses calculated from PWM-voltage source inverter capacitance voltage and compared with desired reference voltage. The proportional integral (PI) controller is determining the dynamic response and settling time of the DC bus voltage, it can be written as
The conventional instantaneous real power calculated from the real power loss and the dc power loss, it can be defined as follows;
The instantaneous current on the coordinates of are divided into two kinds of instantaneous current components; first is real power loss and second is reactive power loss, this controller computed only the real power losses. The coordinate currents are calculated from thevoltages with instantaneous real power and reactive power assume as zero. This approach is reduced the calculations and different from the conventional methods; the coordinate currents can be calculated as
The references of the compensating currents are calculated instantaneously without any time delay by using the instantaneous -coordinate currents. The desired references current derivate from the inverse Clarke transformation, it can be written as
The reference currents compared with actual source current and generated PWM-VSI gate drive signals using the hysteresis controller.
Positive sequence detector
Clarke Transformation
Instantaneous Real (P) power calculation
Inverse Clarke Transformation
α-β current calculation
PI controller
LPF
vsa
vsb
vsc
isa
isb
isc
Vα
Vβ
iβ
iα
Vα
Vβ
Vdc
Vdc,ref
icα
icβ
isa*
isb*
isc*
Fig 2 Block diagram for the sinusoidal current control strategy
The small amount of real power is adjusted by changing the amplitude of fundamental component of reference current and the objective of this algorithm is to compensate all undesirable components. The control strategy indicates that shunt APLC should draw the inverse of the non active current of the load and the results shown compensated currents are proportional to the corresponding phase voltage. When the power system voltages are balanced and sinusoidal, it leads to constant power at the dc-side capacitor.
Positive sequence voltage detector
Fig 3 shows the block diagram of the positive-sequence voltage detector, it consists part of PLL circuit, Clarke transformation, instantaneous power calculation (p-q theory concept), voltage calculation and inverse transformation. The voltages are transformed into the coordinates to determineusing Clarke transformation (refer equation 1). They are used to meet with auxiliary currents that are produced in the PLL circuit to calculate the auxiliary powers.
The amplitude of the auxiliary currents is set to unity. The first order Butterworth low pass filter with cutoff frequency at 50 Hz is used for obtaining the average powers.
Clarke Transformation
Instantaneous power calculation
Inverse Clarke Transformation
α-β voltage calculation
LPF
Vsa
Vsb
Vsc
Vα
Vβ
iα
PLL circuit
LPF
iβ
Vβ'
Vα'
Fig 3 positive sequence voltage detector
The instantaneous voltages which correspond to time functions of the fundamental positive sequence voltage detector of the system
The instantaneous three-phase voltages can be calculated from the coordinate's voltages by applying the inverse Clarke transformation
The positive sequence voltage detector provides good dynamic and satisfactory accuracy even under non-linear or unbalanced load conditions. The detection of the fundamental positive-sequence components of is necessary in the sinusoidal current control strategy. This control strategy makes the shunt APLC to compensate load currents, which produces average real power only is supplied by the source.
Phase locked loop (PLL) circuit
The PLL-synchronizing circuit shown in fig 4 determines automatically the system frequency and the inputs are line voltages and. The outputs of the PLL circuit are the coordinate synchronizing currents. The current feedback signals and is built up by the PLL circuit and time integral of output calculated of the PI-Controller. It is having unity amplitude and lead to 1200 these represent a feedback from the frequency.
-cos (ωt - π/2)
Sin (ωt - π/2)
Sin (ωt)
Sin (ωt+2π/3)
PI
Controller
Vab
Vcb
∑
Fig 4 Phase locked loop circuit
The PLL synchronizing circuit can reach a stable point of operation when the input of the PI controller has a zero average value (). Once the circuit is stabilized, the average value of is zero and the phase angle of the supply system voltage at fundamental frequency is reached. At this condition, the currents become orthogonal to the fundamental phase voltage component. The PLL synchronizing output currents are defined as
The PLL design should allowed proper operation under distorted and unbalanced supply voltages. The PLL synchronizing output currents used to determine the instantaneous power calculation and generate unitary and balanced sinusoidal voltage.
Hysteresis current controller
iactual(t)
iref (t)
e (t)
emax
emin
iout
vout
L
Fig 5 Hysteresis current controller
The current error is derived from the comparison of desired reference current and the actual source current shown in fig 4. If the error current is exceed the upper limit of the hysteresis band (h=0.5), the upper switch of the inverter arm is turned OFF and the lower switch is turned ON. As a result, the current starts to decay. If the error current crosses the lower limit of the hysteresis band (h=-0.5), the lower switch of the inverter arm is turned OFF and the upper switch is turned ON. As a result, the current gets back into the hysteresis band. The range of the error signaldirectly controls the amount of ripple voltage in the output current from the PWM-VSI.
Result and analysis
The performance of the proposed sinusoidal current control strategy based shunt APLC is evaluated through Matlab tools in order to model and test the system under non-linear and/or unbalanced load conditions. The system parameters values are; Line to line source voltage is 440 V; System frequency (f) is 50 Hz; Source impedance of RS, LS is 1 Ω and 0.1 mH; Filter impedance of Rc, Lc is 1 Ω and 0.5 mH; Diode rectifier RL, LL load is 20 Ω and 200 mH; Unbalanced three phase RL, LL load impedance is R1=10 Ω, R2=50 Ω, R3=90 Ω and 10 mH respectively; DC side capacitance (CDC) is 1200 μF; Reference voltage (VDC, ref) is 400 V; Power devices build by IGBT/diode.
Non-linear load condition:
The non-linear or non-sinusoidal RL load consists of six-pulse diode Rectifier and connected ac main network. The Non-linear RL load of diode rectifier parameters are 20 ohms and 200 mH and the simulation time is t=0 to 0.1s. The simulation result of source current after compensation is presented in fig. 5 (a) that indicates the current is sinusoidal. The diode rectifier load current or source current before compensation is shown in fig 5 (b). The desired reference fundamental current extracted from the proposed sinusoidal current controller, shown in fig. 5(c). The shunt APLC supplies the compensating current that is shown in fig. 5(d). These current waveforms are particular phase (phase a). Other phases are not shown as they are only phase shifted by 1200
(a)
(c)
(b)
(d)
Fig.5 Simulation results for three-phase active-power-line conditioners under non-linear load condition (a) Source current after APLC, (b) Load currents or source current before compensation, (c)Reference currents by the sinusoidal current control algorithm and (d) Compensation current by APLC
Non-Linear with Unbalanced load condition:
The three phase unbalanced RL load connected parallel with diode rectifier non-linear load in the three phase ac main network, shown in fig 1. The unbalanced three phase RL load impedance are R1=10 Ω, R2=50 Ω, R3=90 Ω and 10 mH respectively and the simulation time is t=0 to 0.1s counted. The unbalanced RL load current or source current before compensation is shown in 6 (a). The three-phase source current after compensation is presented in fig. 6 (b) that indicates the current becomes sinusoidal. The shunt APLC supplies the compensating current based on the proposed controller that is shown in fig. 6(c). We have additionally achieved power factor correction as shown in fig. 6(d), a-phase voltage is in- phase with a-phase current.
(b)
(c)
(d)
(a)
Fig.6 Simulation results for three-phase active-power-line conditioners under non-linear with unbalanced load condition (a) RL Load current (b) Source current after APLC (c) Compensation current by APLC and (d) unity power factor waveforms.
DC side capacitor voltage settling time:
The dc side capacitance voltage (Cdc) settling time are controlled by proportional integral (PI) controller and this controller reduces the ripple voltage. The settling time value in both non-linear and unbalanced condition (t=0.02s) are same and it's plotted in fig 7.
Fig 7 the DC side capacitor voltage settling time are same in both non-linear and non-linear with unbalanced load (t=0.02s)
Order of harmonics:
The Fourier analysis of the source current with the fundamental frequency is plotted in fig 9. This order of the harmonics plotted under non-linear and unbalanced condition using sinusoidal current controller based shunt APLC system.
(a)
(b)
(c)
Fig 9 Order of harmonics (a) under the non-linear load condition, the source current without APLC (THD=24.95%), (b) under the non-linear condition with APLC (THD=3.93%) and (c) under the non-linear with unbalanced load condition source current with APLC compensation(THD=3.50%)
Total harmonic distortion (THD):
The total harmonic distortion measured from the source current on the distribution system. The sinusoidal current controller based compensator filter made linear source current to the supply. The total harmonic distortion measured and compared both non-linear and non-linear with unbalanced load condition, shown in table 2.
Table 2 FFT analysis of Total harmonic distortion (THD)
Condition(THD)
Source Current(IS) without APLC
Source Current(IS) with APLC
Non-linear load
24.95 %
3.93%
Non-linear with Unbalanced load
21.95%
3.50%
Power factor
0.9188
0.9999
The simulation is done various non-linear and non-linear with unbalanced load conditions. The sinusoidal current control based compensating active filter made balance responsibility even the system is unbalanced. FFT analysis of the active filter brings the THD of the source current less than 5% into adopted with IEEE 519-1992 and IEC 61000-3 standards harmonic under non-linear and/or unbalanced load conditions.
Conclusion
The shunt active power line conditioner connected to the power distribution system on ac mains in parallel with the load; compensates the current harmonics and reactive power due to the non linear and/or unbalanced loads. The voltage distortions are compensated by positive-sequence voltage detector and harmonic extracted from constant instantaneous power control strategy. The reference current(s) are generated using sinusoidal current control algorithm and PWMVSI gate signals are generated from hysteresis band current controller. The PI-controller used to maintain the dc-side capacitance voltage of the PWM inverter constant. The shunt APLC is investigated in terms of order of harmonics, THD and VDC settling time under different load conditions. The measured total harmonic distortion of the source currents compliance with IEEE 519-1992 and IEC 61000-3 standards. This proposed sinusoidal current control algorithm based APLC system can be implemented field programmable gate array (FPGA) devices attempted as a future work.
