Emergency locator transmitter VLSI Approach

Published: November 21, 2015 Words: 4121

This paper deals with the VLSI Approach for design of Emergency Locator Transmitter of Aircraft with Global Positioning System (GPS) Receiver. Emergency Locator Transmitter (ELT) is an emergency equipment fitted in the air craft which will locate the position during the event of a crash.

The COSPAS-SARSAT (C/S) satellite system has been providing emergency alerting from system compatible ELT for a number of years and thus, has been instrumental in saving many lives around the world. However, locating the site of the crash using this satellite system is less accurate, ambiguous and sometimes involves abnormal delay. But, now a days, technologies such as the Global Positioning System (GPS) can provide good location accuracy.

The integration of a GPS receiver in the existing ELT and re designing the ELT using VLSI technology, would combine very accurate location determination and near instantaneous distress alert. These enhancements would reduce the overall time required to complete the rescue operation. The VLSI design of this integrated unit will be compact, efficient and more reliable.

The primary objective of this paper is to describe the principles, VLSI design and analysis of an integrated GPS receiver and the ELT so that the GPS receiver could provide location information to be incorporated in the transmitted message of ELT. This new equipment ELTGPS could be incorporated with a lot of added extra features so the equipment can be used for non emergency operations also.

The proposed VLSI approach for ELT based GPS design is done considering low power with local supply which turns on during air craft crash, high accuracy, low silicon area, integration of all blocks in single die. The following are the sub blocks used in the proposed GPS based ELT system and their integration with simulation results are described below.

1) Power Supply and voltage regulator:

Two 5V batteries are used in the proposed design, one 5V battery with regulated power supply of 2.5V is for dual port RAM and GPS and other 5V battery with regulated power supply of 2.5V for all the other blocks like crystal, PLL, DAC, modulator, reference circuit, timer, MUX, power amplifier e.t.c. Dual port RAM and GPS 5V battery will be continuously charged through internal air craft power supply because GPS should continuously track latitude / longitude position and store the data in dual port RAM. Power supply for all the blocks used in mixed signal chip will be provided by other 5V battery which will turn on during aircraft crash through G switch. Two Internal regulators which converter 5V to 2.5V supply used for powering all the blocks for better accuracy. Figure 1 illustrates the Block diagram of Linear Voltage Regulator Circuit[1]. The basic building blocks for linear voltage regulator are operational Tran conductance amplifier (OTA), feedback elements (Resistors) and pass transistor to source current from supply.

The following are the specifications for the Voltage Regulators

2) Reference Circuit:

In mixed signals chips reference circuit helps in providing constant reference voltage irrespective of process, voltage and temperature variations. The most popular architecture is bandgap [2] reference circuit generating low temperature coefficient constant output voltage. The bandgap principle is adding a negative temperature coefficient with scalar multiplication of positive temperature coefficient to generate temperature independent output voltage. A diode connected bipolar transistor (VBE) voltage is -ve temperature coefficient cancels with k*∆VBE provides +ve temperature coefficient to generate 1.23V constant output reference voltage used by voltage regulators, PLL, DAC and power amplifier. Figure 2 illustrates block diagram of Bandgap Reference circuit.

The base-emitter voltage of a BJT is given in below equation which is complementary to absolute temperature.

If two BJTs operate with different emitter current densities (by a ratio of n), then the difference between their base-emitter voltages is given in below equation which is proportional to absolute temperature.

By taking the sum of VBE + ΔVBE we get constant output voltage of 1.23 which is approximately equal to energy bandgap of silicon in particular technology.

The following are the specifications for the Bandgap reference circuit

3) Dual Port SRAM:

In GPS based ELT system a dual port RAM circuit [3] is used to continuously store the latitude and longitude locations in normal mode and provide the last updated information to transmitter through DAC, Modulator and power amplifier during aircraft crash. Dual port SRAM is R/W memory circuit that permits the modification (writing) of data bits to be stored in a memory array, as well as their retrieval (reading). The SRAM design consists of SRAM cells, pre-charge, sense amplifiers, MUX, NAND gates, AND gates, NOR gates and row decoder. The popular, full CMOS 6-transistor cell configuration was used to design the SRAM memory array. The full CMOS configuration is shown in figure 3. Some of the advantages of using full CMOS SRAM configuration are low static power dissipation, superior noise margins, high switching speeds and suitability for high-density SRAM arrays.

Static RAM Cell:

The full CMOS 6-transistor cell configuration was chosen for the cell array. Figure 2 shows the schematic of the 6-T cell. The 6-T cell consists of two cross coupled inverters connected with the two nmos transistors on both the ends. Each nmos transistor is connected to an inverter on one side and bit line on the other side. The data value is stored in the net connected to the left side of the M4 nmos in figure 2. The inverse data value is stored in the net connected to the right side of the M3 nmos. The input signal i.e., address line comes from the row decoder, allows the cell to be connected to the complementary bit lines during reading and writing and disconnects otherwise.

Sensor Amplifier Circuit:

A sense amplifier circuit is used to read the data from the cell. In addition, it helps reduce the delay times and minimizes power consumption in the overall SRAM by sensing a small difference in voltage on the bit lines (2). A low-voltage sense amplifier was used in the SRAM design to support high performance. 8 sense amplifier circuits were used for the SRAM design, one for each column.

Decoder Circuit:

A row decoder is used to decode the given input address and select the wordline. When performing a write or, read operation only one of the row is selected and 8 bits of data is transmitted. There are 8 rows and row contained 8 cells each. The row decoder selects one of those rows, depending on the 3 bit address given to it. In order to design an 8X8 SRAM a 3x8 decoder is used. Number of wordline equals to the number of rows in the SRAM cell array. The decoder selects 1 of 8 wordlines, with respect to the input address. The output of the decoder is fed to a 2-input AND. This AND is the wordline driver. This AND supports a large capacitance on the wordline. Each cell loads the wordline with two transistors. Therefore, in the design there would be 16 transistors per wordline forming a large capacitance on the wordline. Other input to this AND is the Clock. Only when both Clock and decoder output signals are enabled, the AND enables a wordline to the rows of SRAM cell arrays. In a typical SRAM design, the output from the decoder would directly enable the wordline. This AND was introduced in the design to achieve a clock enabled design. A NAND based decoder is used in the design. NAND based design is suitable as it faster. In both read and write mode timing information is illustrated in figure 4 and figure 5.

The following are the specifications for the Dual port SRAM

4) Global Positioning System Receiver:

In GPS based ELT system Global Positioning System Receiver [4] is used to continuous update the latitude and longitude data of the air craft into dual port RAM. The input signal to the GPS receiver is analog which is converted to parallel digital data and stores in dual port RAM. The block diagram of GPS receiver is illustrated in figure 6, in this application the Global Positioning System (GPS) Receiver is a 10 channel receiver system which is decided based upon bandwidth. It features fast-acquisition hardware, integrated RF filtering, ADC, TCXO, reset circuits, real-time clock with on-board crystal, and an integrated LNA that allows operation with either active or passive antennas. The user needs only provide DC power and a GPS signal. The 10-channel receiver allows all satellites in view to be tracked, providing an over-determined solution to minimize position jumps caused by individual satellite blockage. The fast-acquisition hardware design greatly reduces the time for signal acquisition when the receiver is initially powered up. The GPS receiver system operates from a single battery supply 2.5 VDC for low power consumption.

The GPS receiver is designed for high-performance and low power consumption, with the benefit of using the system's existing clock reference. This receiver is ideal for integration into ELT system. The only external components required are the GPS RF filter, an IF filter (typically designed from inexpensive discrete), a three-component PLL loop filter, and a few other resistors and capacitors. The designed GPS receiver system integrates the reference oscillator core, the VCO and its tank, the synthesizer, a 1- to 3-bit ADC, and all signal path blocks except for the 1st IF filter.

The following are the specifications for the Global Position System Receiver

5) G Switch:

G Switch is sensor element activates ELT system with a change of velocity of 3.5 fps ± 0.5fps both under normal conditions and while being subjected to 30 G's of cross axis forces. The ELT 110-406HM has an additional five G-switches providing for six activation coverage. The additional five G-switches activate at a G force of 12 G's. The G switch is designed with MOSFET driving a battery (i.e., battery turns on) during aircraft crash which is detected by the velocity of aircraft. Rx Antenna

The following are the specifications for the G-Switch

6) Timer and Counter:

The timer and counter [3] are essential blocks in ELT design because when The ELT activates automatically during a crash and transmits the standard swept tone on 121.5 MHz and 243.0 MHz. The 406.025 MHz transmitter turns on every 50 seconds for the duration of 440 milliseconds (for transmitting standard short message) or 520 milliseconds (for transmitting optional long message). During this time, an encoded digital message is sent to the satellite. The information contained in this message is serial number of the transmitter, country code, position co ordinates etc. The 406.025 MHz transmitter will operate for 24 hours and then shuts down automatically. The 121.5/243.0 MHz transmitter will continue to operate till the battery unit has exhausted its power which typically will be at least 48 hours.

7) Modulator:

In GPS based ELT system a frequency modulator is required to modulate the analog data provided from DAC which is at low frequency to 406MHz or 121.5MHz/243 data by using carrier signal. Frequency modulation uses the information signal from DAC, Vm(t) to vary the carrier frequency within some small range about its original value. Here are the three signals in mathematical form:

We have replaced the carrier frequency term, with a time-varying frequency. We have also introduced a new term: ∆f, the peak frequency deviation. In this form, you should be able to see that the carrier frequency term: fc + (∆f /Vmo) Vm (t) now varies between the extremes of fc-∆f and fc+∆f. The interpretation of ∆f becomes clear: it is the farthest away from the original frequency that the FM signal can be. Sometimes it is referred to as the "swing" in the frequency.

We can also define a modulation index for FM, analogous to AM:

β = ∆f/fm , where fm is the maximum modulating frequency used.

The simplest interpretation of the modulation index, β is as a measure of the peak frequency deviation, ∆f. In other words, β represents a way to express the peak deviation frequency as a multiple of the maximum modulating frequency, fm, i.e. ∆f = βfm.

The following are the performance specifications for the Frequency Modulator

Bandwidth

As we have already shown, the bandwidth of a FM signal may be predicted using:

BW = 2 (β + 1 ) fm ; where β is the modulation index and fm is the maximum modulating frequency used.

FM radio has a significantly larger bandwidth than AM radio, but the FM radio band is also larger. The combination keeps the number of available channels about the same. The bandwidth of an FM signal has a more complicated dependency than in the AM case. In FM, both the modulation index and the modulating frequency affect the bandwidth. As the information is made stronger, the bandwidth also grows.

Efficiency

The efficiency of a signal is the power in the side-bands as a fraction of the total. In FM signals, because of the considerable side-bands produced, the efficiency is generally high. The side-band structure is fairly complicated, but it is safe to say that the efficiency is generally improved by making the modulation index larger. But if you make the modulation index larger, so make the bandwidth larger which has its disadvantages. As is typical in engineering, a compromise between efficiency and performance is struck. The modulation index is normally limited to a value between 1 and 5, depending on the application.

Noise

FM systems are far better at rejecting noise than AM systems. Noise generally is spread uniformly across the spectrum. The amplitude of the noise varies randomly at these frequencies. The change in amplitude can actually modulate the signal and be picked up in the AM system. As a result, AM systems are very sensitive to random noise. An example might be ignition system noise in your car. Special filters need to be installed to keep the interference out of your car radio. FM systems are inherently immune to random noise. In order for the noise to interfere, it would have to modulate the frequency somehow. But the noise is distributed uniformly in frequency and varies mostly in amplitude. As a result, there is virtually no interference picked up in the FM receiver. FM is sometimes called "static free, " referring to its superior immunity to random noise.

8) Crystal Oscillator:

On chip crystal oscillator are most popular to generate clock upto 10MHz-20MHz frequency with less than 2% accuracy. The crystal oscillator [5] provides input frequency to phase lock loop and obtain 121.5 MHz / 243 MHz / 406 MHz output frequencies. A crystal oscillator is developed by using a piezoelectric material; one which transforms electrical energy to mechanical energy and vice versa. The transformation occurs at the resonant frequency of the crystal. This happens when the applied AC electric field is sympathetic in frequency with the mechanical resonance of the slice of crystal. Since this characteristic can be made very accurate, crystals are normally used where frequency stability is critical. Typical frequency tolerance is .005 to 0.3%. The advantage of a crystal oscillator in this application is its wide range of positive reactance values over a narrow range of frequencies. However, there are several ranges of frequencies where the reactance is positive; these are the fundamental, and the third and fifth mechanical overtones. Since the desired frequency range in this application is always the fundamental, the overtones must be suppressed. This is done by reducing the loop gain at these frequencies. Usually, the amplifier's gain roll off, in combination with the crystal parasitic and load capacitors, is sufficient to reduce gain and prevent oscillation at the overtone frequencies. The block diagram of the crystal oscillator is illustrated in figure 8 which consists of amplifier, Crystal, feedback resistors and capacitors.

The following are the specifications for the Crystal Oscillator

9) Phase Lock Loop:

Phase lock loop circuit [6] operates as frequency synthesizer in this application by taking input signal of 20MHz from crystal oscillator and providing output frequencies 121.5MHz / 243MHz / 406MHz. The block diagram of the phase lock loop in illustrated below Figure 9.

A phase-locked loop is a feedback system that operates on the excess phase of nominally periodic signals. This is in contrast to familiar feedback circuits where voltage and current amplitudes and their rate of change are of interest. The major blocks in phase lock loop are phase frequency detector, charge pump, loop filter, voltage controlled oscillator and divider.

The phase-detector compares the frequency and phase of the reference frequency signal, against the phase of the VCO output signal [Feedback Frequency]. Output of the phase-detector is a voltage proportional to the phase difference between its two inputs. The loop is considered “locked” if the phase difference is constant with time. The phase detector output is digital which is converted to analog voltage by using charge pump circuit, the output of the charge pump circuit filtered by the loop-filter. Loop-filter is a lowpass filter, which suppresses the high frequency signal components and noise. Output of the loop-filter is applied to the VCO as the control voltage. This control voltage changes the frequency of the VCO in a direction that reduces the phase difference between the input signal and the local oscillator. When the loop is locked, the control voltage is such that the frequency of the VCO is exactly equal to the average frequency of the input signal; however, there may be a static phase error present. This error tends to be small in a well-designed loop. In GPS based ELT system an input of 20MHz is used by PLL from crystal oscillator to generate output frequencies of 406MHz, 243MHz and 121.5MHz, this frequency clocks are used by modulator to modulate the data w.r.t clock signal.

The following are the specifications for the Phase Lock Loop

10) Digital to Analog Converter:

A current steering Digital to Analog Converter [6] is used in this application which will converter SRAM digital data to analog value and transmit through modulator and power amplifier. The current-steering DAC architecture is illustrated in figure 10. There is a number of current sources and switches. Depending on the input code, the current from the corresponding sources is directed by the switches to the output and terminated by an resistor. The matching errors will strongly influence the performance.

Instead of using a current source with the nominal value one uses unit current sources in parallel. We will then have the same type of edge matching errors for each element. Secondly, we may also use special layout techniques, such as interdigitized or common-centroid in order to smooth out the influence of graded mismatch errors.

The following are the specifications for the Digital to Analog Converter

11) Power Amplifier:

In RF transceivers power amplifiers plays major role which will take a small-amplitude signal at the output RF frequency as its input and drives a high power representation of the input into a low impedance load . In GPS based ELT system the analog output of the modulator is not capable to drive the antenna and hence power amplifier circuit is used to boost the power level of the signal, because the peak power levels required will be significantly higher than the modulator can supply on its own. The power amplifier is one of the final blocks to be implemented and integrated with the other blocks onto a single CMOS chip. One of the key reasons for the general industry-wide reluctance to move the implementation of the power amplifier to CMOS is the fact that while the power amplifier is on, it can dominate the power consumption of the entire transceiver. The power amplifier output power level is on the order of hundreds of mill watts or more, the power that the power amplifier needs to deliver to its load in itself is a large percentage of the total power consumed by the entire transmitter. In essence, the power amplifier converts the DC power from the battery into RF power delivered to the load. Unless that power conversion is lossless, which is possible only as an ideal abstraction, the power amplifier itself will consume power, over and above what it delivers. The important specification of the power amplifier is efficiency and a class C power amplifier is used in this application because it provides more than 90% efficiency.

The following are the specifications for the Power Amplifier circuit

12) Buzzer Driver:

A Buzzer driver is used to blow the horn output during aircraft crash. When an air craft is crashed then G-switch will turn on which activate GPS based ELT system and parallel drives buzzer to blow horn or it can also drive an LED system.

13) Manual Reset:

A Manual reset option is provided for GPS based ELT system along with G-switch to test the application on board along with creating an environment of aircraft system.

14) Integration:

Operation:

One of the primary features of the ELT 110-406 is its simplicity of operation. As long as ELT is located into its mounting tray, it will activate in crash, neither the cockpit switch nor the ELT unit switch can be positioned to prevent automatic activation once the unit is mounted properly. ELT is also designed against human error and misuse in regards to automatic activation. The unit activates only when securely mounted in its tray [G-Switch ON]. The ELT cannot be accidently activated by droping, rough handling or during shipping.

When the ELT is activated, the presence of the emergency swept tone and a flashing panel light indicates a normally functioning unit. The front panel light must immediately begin to continuously flash upon ELT activation. Under normal operation the switch configuration on your front panel is the down position, reading “ARM”. The switch on the ELT unit will also be positioned down to read “OFF”. Should an emergency arise to the degree that manual wants to activate ELT, reverse either switch so it is in the up (“ON”) position. Remember, that as long as the front panel and ELT switches are in the ARM/OFF position the ELT will automatically activate on impact. If ELT is activated accidentally then we need to reset it, which can be done by moving front panel switch to “ON” then immediately rocking it back to “ARM”. We can also reset the ELT at the unit itself by positioning the switch on the ELT up to “ON” then immediately back down to “OFF”.

Functionality:

Figure 12 illustrates the integration of all above blocks to determine the functionality for GPS based ELT system. The functionality of the GPS based ELT system is described as follows, GPS based ELT system has two modes

(a) Normal Mode: In normal operation aircraft is running fine and the global position system receiving antenna will continuously track the latitude and longitude locations at a speed of 1575MHz and stores the data in dual port RAM. In normal operation bandgap reference circuit(1) will generate 1.23V reference voltage to voltage regulator and voltage regulator will generate 2.5V output w.r.t 5V input from battery for low power operation. The voltage regulator 2.5V output powers global position system receiver and dual port RAM.

(b) Aircraft crash mode: When air craft is crashed i.e., aircraft crash mode then G-Switch will turn on the bandgap reference circuit(2) and voltage regulator(2) which will power up all the other blocks [Crystal oscillator, PLL, modulators, digital to analog converter, timer, counter and power amplifier] parallely A Buzzer driver is used to blow the horn or it can also drive an LED system. Initially crystal oscillator will start functioning once voltage regulator (2) provides power and crystal oscillator will provide 15MHz low jitter clock to PLL. PLL will generate lock signal when the desired output frequencies 406MHz, 121.5MHz/243MHz clocks/carrier signals are obtained for modulators and digital to analog converter, the lock signal activates the read mode of dual port RAM which will latch the data on to the digital to analog converter. GPS based ELT system in aircraft crash mode will transmit 121.5MHz/243MHz clock signals continuously and 406.025 MHz data transmitter turns on every 50 seconds for the duration of 440 milliseconds (for transmitting standard short message) or 520 milliseconds (for transmitting optional long message). During this time, an encoded digital message is sent to the satellite. The information contained in this message is serial number of the transmitter, country code, position co ordinates etc. The digital to analog converter output to given to modulator, after modulation [data and carrier signal] the data is given to power amplifier to boost output power level and drive transmitting antenna.

GPS based ELT system has standard code format of transmission and there are three coding options of this protocol that can be used with ELTs. An interactive diagram of each, depicting the information which should be coded into the beacon is provided below.