ECG is the electrical manifestation of the contractile activity of the hearts myocardium. The P, QRS and T waves characterize the ECG waveform . The most prominent feature is the QRS complex, where R denotes the peak of QRS complex. Two electrodes placed over different areas of the heart and connected to the galvanometer will pick up the electrical currents, resulting from the potential difference between them. The resulting trace of voltage difference at any two sites due to electrical activity of the heart is called a "lead".
The electrical signals of heart obtained from the patient's body are of very low strength (2.5mV) & mixed with noise. The instrumentation amplifier and further Inverting amplifier amplify the low strength signals and non-inverting amplifiers to provide gain up to 1000. Three different types of noise are present in the signal.
• DC Electrode offset potential
• 50Hz AC induced interference.
• The electrodes pick up muscular noise.[12]
6.2 OVERALL SYSTEM MODULE
The electrical signals of heart obtained from the patient's body are of very low strength (2.5mV), low frequency & mixed with noise. The instrumentation amplifier amplifies the low strength signals and filters eliminate the noise. ADC then converts the amplified clean signal into digital samples. The micro controller takes care of acquiring the samples & storing them in memory. The data acquired from memory is converted into serial data & transmitted through Com4 port to transmission module. The reception module receives the data & transmits it serially to computer through Com4 port. The data is represented in graphical format on computer.
The essential components involved in the ECG signal acquisition and processing are:
3 lead configurations are used for the method of signal acquisition. Unipolar leads are placed across the limbs in accordance to the Einthoven triangle law. Pregelled disposable surface electrodes are used for signal capture. Hypoallergenic, Ag AgCl flat pellet spread with a thin coating of a 0.5 percent saline base conductive gel and embedded into a fabric style backing. [1] They adhere very well to the skin and are clean to use.
6.2.1 INSTRUMENTATION AMPLIFIER
This is intended for low level signal amplification where low noise, low thermal and time drifts, high input impedance and an accurate close loop gain are required. Besides, high CMRR and high slew rate are desirable for superior performance. As ECG signal is of very low amplitude, instrumentation amplifier is used to amplify it at initial level so that ECG signal will not get loaded. The two signals entering the differential amplifier are subtracted to cancel the common noise present in the signal.
6.2.2 ±5V REGULATED POWER SUPPLY
The 7805, 7905 regulators were used in the implementation. They are both able to supply 1A of current.[7] Both regulators are loaded until breakdown in the simulation. The 7805 is successfully able to deliver 910mA before breakdown. The 7905 however only supplied 632mA. However this is more than sufficient for the purpose of the design.[1]
The ECG device must be able to deal with extremely weak signals obtained from the electrodes. These signals are typically in the range of 0.5 mV to 5.0 mV. Furthermore the signal is coupled with a D.C component of up to ±300 mV which results from the electrode-skin contact, plus a common-mode component of up to 1.5 V , resulting from the potential between the electrodes and ground. The front-end circuitry uses an instrumentation amplifier (I.A)
6.3 ANALOGUE FRONT END
6.3.1 IMPLEMENTATION USING INA-114:
The characteristics of the discrete differential amplifier may be improved by combining the three individual amplifiers in to a single IC, commonly known as an Instrumentation Amplifier
The INA114 is a low cost, general purpose instrumentation amplifier offering excellent accuracy. Its versatile 3-op amp design and small size make it ideal for a wide range of applications. A single external resistor sets any gain from 1 to 10,000. The INA114 is available in 8-pin plastic and SOL-16 surface-mount packages. Both are specified for the -40°C to +85°C temperature range. Gain of the INA114 is set by connecting a single external resistor Rg .[appendix ]
Gain = 1 + (50K/Rg)………(1)
The stability and temperature drift of the external gain setting resistor, Rg, also affects gain. Rg's contribution to gain accuracy and drift can be directly inferred from the gain equation (1).[appendix]
Figure 6.1 :Basic connections of INA114
Figure 6.1 illustrates the INA-114 connection scheme utilized in the implementation. The INA-114 has a maximum gain of with this suitable design.[appendix 2] The gain selection of the INA-114 is however critical to the design of the entire system.
6.3.2 ANTI-ALIASING LOW-PASS FILTER
An anti-aliasing Low-Pass filter is required to band limit the incoming ECG signal prior to digitization. Once the converted ECG signal is "Contaminated" with Aliased Noise, it takes time and memory within the controller to eliminate the noise.. The anti-aliasing low-pass analogue filter is placed immediately before the ADC.
Figure 6.2: Low-pass Filter Figure 6.3: High Pass filter
The anti-aliasing filter cut-off frequency (Fc) is set to the highest ECG frequency component of interest (Fmax) so that Fc = Fmax. [13]As mentioned previously a maximum frequency component of 100Hz is present in the representation of ECG signals. The filter was hence designed to have a cut-off frequency of 100Hz.
6.3.3 REMOVING THE D.C OFFSET COMPONENT
Initially the output of the differential amplifier was interfaced directly to the Anti-aliasing filter without removing the D.C offset component. Observing the signal at the output of the filter while using this configuration showed that the signal ranged anywhere between 45mV - 2.5V. [13] This was unacceptable as the 45mV signal was too small to be adequately represented digitally with a 8 bit Analogue to Digital Converter. This was achieved by simply placing a 100μF capacitor, at the output of the differential amplifier. Observing the output of the filter after placing the capacitor yields an output ranging 63mV.
Figure 6.4: Implementation of INA 114 with TLO 74
6.4 RESULTS AND ANALYSIS OF THE ANALOGUE FRONT END
The output of the Low pass filter prior to the offset and gain stage was measured using an oscilloscope. The signal is approximately 20mV p-p.
The Instrumentation amplifier gain was set to thousand, which was accomplished by setting the value of the feedback resistance Rg to 50 ohms. The amplified signal was bandpass filtered by setting appropriate low pass and high pass cut off frequencies. Thus the acquired signal falls within the typical ECG signal range.
6.5 INTRODUCTION TO DIGITIZATION
As mentioned previously the design is broken down into two components. An acquisition and processing unit is attached to the person being monitored. A second unit is attached to the P.C.
At the core of the acquisition unit is a low cost analog to digital converter PCF8591 and microcontroller AT89C51.The analog to digital converter PCF89C51 is responsible for digitization of the raw ECG data acquired from the analogue front end hardware, before aligning the data for transmission. The primary purpose of choosing such a high performance processor is to perform all the necessary filtration in the digital domain thus reducing the overall size, power consumption, efficiency and cost of the mobile device.[5]
6.5.1 DIGITIZATION USING PCF8591
The PCF8591 is a single-chip, single-supply low power 8-bit CMOS data acquisition device with four analog inputs, one analog output and a serial I2C-bus interface. Address, control and data to and from the device are transferred serially via the two-line bidirectional I2C-bus.[5] Three address pins A0, A1 and A2 are used for programming the hardware address and 8-bit successive approximation A/D conversion
6.5.2 RESOLUTION OF PCF8951
The resolution of the converter indicates the number of discrete values it can produce over the range of analog values. The values are usually stored electronically in binary form, so the resolution is usually expressed in bits.
PCF8591 has a resolution of 8 bits and hence can encode an analog input to one in 256 different levels, since 28 = 256.
Expressed in voltage,
Q=resolution=v (ref hi)-v (ref low)/N
N=2*m -1, where m is the resolution in bits
Hence Q=5/255=0.019v
6.5.3 ANALOGUE TO DIGITAL CONVERTER INITIALIZATION
The sampling rate must conform to Nyquist sampling theorem which states:
"For a band-limited (Finite Bandwidth) signal with maximum frequency fmax, the equally spaced sampling frequency fs must be greater than twice of the maximum frequency Fmax[20], i.e.,Fs≥2Fmax In order for the signal be uniquely reconstructed without aliasing" [21-22]
The frequency 2·Fmax is called the Nyquist sampling rate. Fmax is commonly referred to as the Nyquist frequency. For the ECG system Fmax = 100Hz. The sampling frequency therefore needs to be set to a minimum of 250Hz.
6.5.4 ADC SAMPLING FREQUENCY
The first major operation is to take a sample of an analog input and hold that sample for analysis. The sample is then held in the sample and hold amplifier. Sufficient time must be given to the converter to capture an accurate representation of the signal. The A/D will then analyze the output of the sample-and-hold amplifier and convert the information into a digital number.[15] The datasheet PCF8591 specifies that the conversion time be set to a minimum of 10μs.
The A/D converter makes use of the successive approximation conversion technique. An A/D conversion cycle is always started after sending a valid read mode address to a PCF8591 device. Once a conversion cycle is triggered an input voltage sample of the selected channel is stored on the chip and is converted to the corresponding 8-bit binary code. Samples picked up from differential inputs are converted to an 8-bit twos complement code. The conversion result is stored in the ADC data register and awaits transmission. If the auto-increment flag is set the next channel is selected.[22-23]
6.5.5 OSCILLATOR
An on-chip oscillator generates the clock signal required for the A/D conversion cycle. Oscillator frequency is given to be 0.75 − 1.25 MHz
6.5.6 I2C BUS CHARACTERISTICS
The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). One data bit is transferred during each clock pulse. Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is defined as the stop condition (P).[17]
The filtered ECG signal is transmitted via AT89C51-SPI (Serial Peripheral Interface) to a ZIGBEE pro (RF) Transceiver. The P.C unit receives the data which communicates with the P.C via USB plotting the resultant ECG traces on the P.C screen using a custom written VB 6 Basic 6.0 application.
CHAPTER 7
TRANSMITTER AND RECEIVER SECTION
7.1MICROCONTROLLER FIRMWARE
7.1.1 AT89C51
The PCF8591 Hardware modules discussed previously are utilized in the Microcontroller Firmware implementation. The Firmware is essentially used so as to interface the hardware components to the microcontroller-AT89C51,
The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. The SDA and SCL data lines are given to the read and write control logic of the microcontroller (pin 16 and pin 17).Thus communication is established between the microcontroller and the digitizer hardware by suitably programming the microcontroller.[16]
SCON (Serial Control Register) holds the control and setup information for programming the serial port. When SM0 and SM1 of SCON is set to 01, it becomes a full duplex UART receiver/transmitter
SBUF (Serial Interface Buffer Register) contains the transmit data to be sent or received data.
The Zigbee module is further interfaced to the transmitter (Tx) pin of the microcontroller (pin number 11).the microcontroller has been programmed to exhibit standard UART mode of communication between the controller and the zigbee module.[25]
7.1.2 UART COMMUNICATION
The Universal Asynchronous Receiver/Transmitter (UART) controller is the key component of the serial communications subsystem of a computer. The UART takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes.
Serial transmission is commonly used with modems and for non-networked communication between computers, terminals and other devices.
Asynchronous transmission allows data to be transmitted without the sender having to send a clock signal to the receiver.[27] Instead, the sender and receiver must agree on timing parameters in advance and special bits are added to each word which are used to synchronize the sending and receiving units.
When a word is given to the UART for Asynchronous transmissions, a bit called the "Start Bit" is added to the beginning of each word that is to be transmitted. The Start Bit is used to alert the receiver that a word of data is about to be sent, and to force the clock in the receiver into synchronization with the clock in the transmitter.[14]
After the Start Bit, the individual bits of the word of data are sent, with the Least Significant Bit (LSB) being sent first.
When the receiver has received all of the bits in the data word, it may check for the Parity Bits (both sender and receiver must agree on whether a Parity Bit is to be used), and then the receiver looks for a Stop Bit. If the Stop Bit does not appear when it is supposed to, the UART considers the entire word to be garbled and will report a Framing Error to the host processor when the data word is read.
7.1.3. BAUD RATE CALCULATION
It is the rate of data transfer in serial data transmission, stated in bits per second. Most typically, the timer is configured in the auto-reload mode (mode 2, high nibble of TMOD = 0100B). In this case, the baud rate is given as
2^smod Oscillator frequency
Baud rate = ------- x --------------------
32 12 x (256 - TH1)
However we have programmed the microcontroller to transmit data with a baud rate equivalent 9600. Smod is taken to be 0 since we are using the same baud rate of timer 1.
Calculating TH1 value,
TH1=256-[{(2*SMOD)*OSC.FREQ}/32*12*BAUD RATE] TH1=253=FD(hex)
7.2 KEY FEATURES
Zigbee is the name of a specification for a suite of high level communication protocol using small, low power digital radios based on the IEEE 802.15.4 standard. Zigbees are usually targeted at RF applications which require low data rate,long battery life and a secure networking
7.3 MODULE OPERATION
Xbee module employs a UART interface which allows any microcontroller to immediately use the services of zigbee protocol. We must ensure that the host logic level is compatible with the zigbee logic level (2.8V-3.4V).[10]
The XBee-PRO OEM RF Modules interface to a host device through a logic-level asynchronous serial port. It communicates using serial mode of transmission. Through its serial port, the module can communicate through a level translator to any serial device (For example: Through a Max- Stream proprietary RS-232 or USB interface board).
7.3.1 UART DATA FLOW
Figure 7.1: System Data Flow Diagram in a UARTâ€interfaced environment
Data enters the module UART through the DI pin (pin 3) as an asynchronous serial signal formatted as a start bit, 8 information bits and a stop bit. The signal should idle high when no data is being transmitted.
The input data goes to the input of UART of the Xbee module. In this case no RS-232 level conversions are required.The module UART performs tasks such as timing and parity checking, that are needed for data communications.
The DO pin produces received asynchronous serial data. Hence to put the zigbee to work we have 3 wired DIN, D0 and GND pins.
This module exhibits two modes
1. Idle mode-no data transmission
2. Transparent mode-serial line replacement occurs. All data passing through the DIN pin is queued up for RF transmission and all incoming RF data is piped out of Xbee's D0.
The CTS (clear to send) function is used to throttle excess data send to the transmitter circuitry.
7.3.2 SERIAL TO RF PACKETIZATION
Data is buffered in the DI buffer until one of the following causes the data to be packetized and transmitted:
No serial characters are received for the amount of time determined by the RO (Packetization Timeout) parameter. If RO = 0, packetization begins when a character is received.
The maximum number of characters that will fit in an RF packet (100) is received.
The incoming RF data is further stored in the D0 buffer before being pushed out of Xbee's D0 pin. Hardware control of D0 buffer is controlled by RTS function. (When RTS goes high, no data is sent out of the D0 pin)
7.4 RECEIVER SECTION
7.4.1 ACKNOWLEDGEMENT SIGNAL
The module will expect to receive an acknowledgement from the destination node. If an acknowledgement is not received, the RF packet will be resent up to 3 more times. If the acknowledgement is not received after all transmissions, an ACK failure is recorded.[16-21]
7.4.2 RECEIVE PACKET
When the module receives an RF packet, it is sent out the UART using this message type where the MSB (most significant byte) is received first and LSB (least significant) is received last. Up to 100 Bytes per packet can be received.
7.5 ANTENNAS
XBee Modules have been tested and approved for use with all of the antennas listed in the table below.
DESCRIPTION
GAIN
Dipole (Half-wave articulated RPSMA - 4.5")
2.1 dBi
Dipole (Articulated RPSMA)
2.1 dBi
Monopole (Integrated whip)
1.5 dBi
Table 7.2 Antennas approved for use with the XBee/XBeeâ€PRO RF Modules[24]
CHAPTER 8
MAX 232 AND VB PLATFORM
8.1 MAX 232
A suitable interface for viewing the waveform in the PC has been constructed in MAX-232 platform. The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals suitable for use in TTL (transistor-transistor logic) compatible digital logic circuits. The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS signals.
A standard serial interfacing for PC, RS232C, requires negative logic, i.e., logic '1' is -3V to -12V and logic '0' is +3V to +12V. To convert TTL logic, say, TxD and RxD pins of the microcontroller chips and thus need a converter chip. A MAX232 chip has been used as it provides 2-channel RS232C port and requires external 10uF capacitors.
Figure 8.1: MAX 232 interface
8.2 VISUAL BASIC 6.0 GRAPHICAL USER INTERFACE (GUI)
A simple intuitive GUI is implemented for the display of the ECG data. The GUI is implemented using visual basic 6.0 Enterprise Edition.
8.2.1 COM PORT SETTINGS
As mentioned previously the driver creates a virtual Com Port.The port number however is dependant on the USB port selected.. Hence it is necessary to check the port settings under the Windows Device Manager prior to connection.
8.2.2 GUI FUNCTIONALITY
The GUI employs a multiple form Interface (MDI). On start-up the parent form is loaded. An additional forms (known as child form) are linked to the parent form. the option under child form loads the ecg plotting trace consecutively when the form is clicked. Each lead vector is plotted in its corresponding picture box and no storage of data takes place.[22-23]
8.2.3AMPLITUDE SETTINGS
Typical ECG display software measures the signal in terms of mV. However the signal being transmitted is in the Volt range (amplified) and has been offset to accommodate the requirements of the microcontroller. The signal is hence categorized manually by simultaneously displaying the raw ECG signal on an oscilloscope (output of differential amplifier)
8.2.4 TIMESCALESETTINGS
A similar method is utilised in categorizing the time scale while simultaneously viewing the Data on the GUI. The time/division was varied while measuring the time between successive peaks measured and calculating the mm/sec value.
CHAPTER 9
RESULTS AND INTERPRETATION
A very detail performance of the entire designed system with special emphasis on the wireless transmission using Zigbee protocol is elaborately discussed. The results are compared with the objectives clearly set out .Analysis of the performance and functionality of both hardware and software designs are discussed, with an evaluation of the entire system as a whole.
9.1 DESIGN
The design system consists of a wireless communication system which transfers ECG data from acquisition unit which involves the ECG electrodes placed on a patient body to a PC for evaluation. However there are certain shortcomings of the design, some of which are hoped, can be resolved before
the demonstration of the product.
Figure 9.1: Amplified ECG signal
However the design of the ECG acquisition circuit involving a key amplifier stage was successful as can be seen in Figure 9.1 which shows an ECG signal on the digital storage oscilloscope. Bandpass Filtering within 0.5 hz to 100 hz were used to remove unwanted noise. Furthermore this wireless device is designed to record single channel of full-spectrum ECG. It can monitor ECG of a patient, who is far apart. The device analyzes ECG for real time and will display amplitude and intervals of some critical components. The system consist of two sections
1. Transmitter: ECG signals captured by Electrodes are processed and filtered by signal conditioning block. Filtered signals are given to PCF8591 for conversion into 10-bit digital data. Digital data is transferred to the master zigbee module by suitably interfacing the module with an AT89C51 microcontroller. Data is transmitted at a frequency of 2.4 GHz and the distance of effective transmission was observed to be 35m.
2. Receiver: At the receiver side we have slave zigbee RF module and PC to display waveform. The slave node will receive data at 2.4GHz, and transfer it to the COM I port of PC using suitable level converters. The ECG signal is displayed on screen using the Visual Basic .This not only provided the platform by which our threads can execute, but it also is very useful in performing the requirements of the further analysis techniques.
Figure 9.2: ECG monitoring in Visual Basic Platform
Figure 9.3: Transmitter
Figure 9.4: Receiver
CHAPTER 10
